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» Hardware Accelerated Power Estimation
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128
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ASAP
2005
IEEE
133views Hardware» more  ASAP 2005»
15 years 8 months ago
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
128
Voted
ASAP
2007
IEEE
133views Hardware» more  ASAP 2007»
15 years 6 months ago
An Efficient Hardware Support for Control Data Validation
Software-based, fine-grain control flow integrity (CFI) validation technique has been proposed to enforce control flow integrity of program execution. By validating every indirect...
Yong-Joon Park, Zhao Zhang, Gyungho Lee
194
Voted
VLSISP
2011
358views Database» more  VLSISP 2011»
14 years 9 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
ISLPED
1996
ACM
100views Hardware» more  ISLPED 1996»
15 years 6 months ago
Basic experimentation on accuracy of power estimation for CMOS VLSI circuits
In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods...
Tohru Ishihara, Hiroto Yasuura
ISLPED
1998
ACM
95views Hardware» more  ISLPED 1998»
15 years 6 months ago
The petrol approach to high-level power estimation
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-...
Rafael Peset Llopis, Kees G. W. Goossens