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» Hardware Acceleration of HMMER on FPGAs
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ARC
2008
Springer
115views Hardware» more  ARC 2008»
13 years 10 months ago
A High Throughput FPGA-based Floating Point Conjugate Gradient Implementation
As Field Programmable Gate Arrays (FPGAs) have reached capacities beyond millions of equivalent gates, it becomes possible to accelerate floating-point scientific computing applica...
Antonio Roldao Lopes, George A. Constantinides
CF
2009
ACM
14 years 2 months ago
Wave field synthesis for 3D audio: architectural prospectives
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
Dimitris Theodoropoulos, Catalin Bogdan Ciobanu, G...
TVLSI
2008
121views more  TVLSI 2008»
13 years 7 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
SIGMOD
2009
ACM
157views Database» more  SIGMOD 2009»
14 years 8 months ago
FPGA: what's in it for a database?
While there seems to be a general agreement that next years' systems will include many processing cores, it is often overlooked that these systems will also include an increa...
Jens Teubner, René Müller
PDCAT
2007
Springer
14 years 2 months ago
High Throughput Multi-port MT19937 Uniform Random Number Generator
ct There have been many previous attempts to accelerate MT19937 using FPGAs but we believe that we can substantially improve the previous implementations to develop a higher throug...
Vinay Sriram, David Kearney