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» Hardware Acceleration of HMMER on FPGAs
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ARC
2009
Springer
188views Hardware» more  ARC 2009»
14 years 2 months ago
Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator
Abstract. Monte Carlo simulation is one of the most widely used techniques for computationally intensive simulations in mathematical analysis and modeling. A multivariate Gaussian ...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 2 months ago
Model-based synthesis and optimization of static multi-rate image processing algorithms
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
Joachim Keinert, Hritam Dutta, Frank Hannig, Chris...
IPPS
1999
IEEE
14 years 4 days ago
FPGA Implementation of Modular Exponentiation
An e cient implementations of the main building block in the RSA cryptographic scheme is achieved by mapping a bit-level systolic array for modular exponentiation onto Xilinx FPGAs...
Alexander Tiountchik, Elena Trichina
IOLTS
2009
IEEE
124views Hardware» more  IOLTS 2009»
14 years 2 months ago
On-line characterization and reconfiguration for single event upset variations
The amount of physical variation among electronic components on a die is increasing rapidly. There is a need for a better understanding of variations in transient fault susceptibil...
Kenneth M. Zick, John P. Hayes
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
14 years 1 months ago
HIBI-based multiprocessor SoC on FPGA
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
Erno Salminen, Ari Kulmala, Timo D. Hämä...