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MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
14 years 3 days ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan
ICECCS
1996
IEEE
109views Hardware» more  ICECCS 1996»
14 years 2 days ago
Dynamically Reconfigurable Embedded Software - Does It Make Sense?
A dynamically reconfigurable real-time software (DRRTS) paradigm can be used effectively in the design of embedded systems to provide many major advantages over conventional softw...
David B. Stewart, Gaurav Arora
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
14 years 21 hour ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
14 years 19 hour ago
Transactional Memory: Architectural Support for Lock-Free Data Structures
A shared data structure is lock-free if its operations do not require mutual exclusion. If one process is interrupted in the middle of an operation, other processes will not be pr...
Maurice Herlihy, J. Eliot B. Moss
ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
13 years 12 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov