— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Sketches--data structures for probabilistic, duplicate insensitive counting--are central building blocks of a number of recently proposed network protocols, for example in the con...
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Estimation of static and dynamic energy of caches is critical for high-performance low-power designs. Commercial CAD tools performing energy estimation statically are not aware of...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...