This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
With rapid development of the Internet, e-learning system has become more and more popular. Currently, to solve the issue of sharing and reusing of teaching materials in different...
Jun-Ming Su, Shian-Shyong Tseng, Chia-Yu Chen, Jui...
In this paper, we propose a hardware performance monitor that provides support not only for measuring cache misses and the addresses associated with them, but also for determining...
specified at levels of abstraction higher than the Register Transfer Level (RTL) in hardware description. The essential feature of a behavioral description is that, the designer on...