398 search results - page 36 / 80 » Hardware Reuse at the Behavioral Level |
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
C-based design techniques and methodologies have been proposed to tackle the complexity of heterogeneous embedded systems. The heterogeneity comes in the functionalities and the im...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
ACSD
2001
IEEE
14 years 4 days ago
2001
IEEE
Synchronous languages allow a high level, concurrent, and deterministic description the behavior of reactive systems. Thus, they can be used advantageously for the programming of ...
DDECS
2008
IEEE
13 years 10 months ago
2008
IEEE
Defects not described by conventional fault models are a challenge for state-of-the-art fault diagnosis techniques. The X-fault model has been introduced recently as a modeling te...
IEEEPACT
2009
IEEE
13 years 6 months ago
2009
IEEE
Efficiently using the hardware capabilities of the Cell processor, a heterogeneous chip multiprocessor that uses several levels of parallelism to deliver high performance, and bei...