A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
∗ Diagnosis is becoming a major concern with the rapid development of semiconductor memories. It provides information about the location of manufacturing defects in the memory, a...
Alexandre Ney, Patrick Girard, Serge Pravossoudovi...
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. We believe that recent trends in both th...
Matthew B. Dwyer, John Hatcliff, Matthew Hoosier, ...
The paper discusses a top-down approach to model soccer knowledge, as it can be found in soccer theory books. The goal is to model soccer strategies and tactics in a way that they ...
Frank Dylla, Alexander Ferrein, Gerhard Lakemeyer,...