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ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
12 years 11 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
14 years 1 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
CODES
2005
IEEE
14 years 1 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
ESOP
2010
Springer
14 years 5 months ago
Faulty Logic: Reasoning about Fault Tolerant Programs
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
Matthew L. Meola and David Walker
DAC
2002
ACM
14 years 8 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid