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CODES
2003
IEEE
14 years 1 months ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 9 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
ENGL
2007
71views more  ENGL 2007»
13 years 7 months ago
The Development of a Generic Technique for Flow Line Monitoring
Realize the operating conditions of a manufacturing plant are essential for providing corresponding actions responsively. This is because all processes are interrelated and a smal...
C. S. Tang, C. Y. Chan, Kai-Leung Yung
ASPLOS
2009
ACM
14 years 8 months ago
Mixed-mode multicore reliability
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
WSC
1998
13 years 9 months ago
A Workbench for Predicting the Performances of Distributed Object Architectures
The development of a Distributed Information System (DIS) can lead to critical bottlenecks because of the underlying architecture, which is becoming more and more complex. Todays ...
Sophie Dumas, Georges Gardarin