230 search results - page 40 / 46 » Hardware Support for Control Transfers in Code Caches |
OOPSLA
2010
Springer
13 years 7 months ago
2010
Springer
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
JCST
2008
13 years 8 months ago
2008
Stride prefetching is recognized as an important technique to improve memory access performance. The prior work usually profiles and/or analyzes the program behavior offline, and u...
ISPASS
2006
IEEE
14 years 2 months ago
2006
IEEE
Stride-based prefetching mechanisms exploit regular streams of memory accesses to hide memory latency. While these mechanisms are effective, they can be improved by studying the p...
MICRO
2000
IEEE
13 years 8 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...