230 search results - page 44 / 46 » Hardware Support for Control Transfers in Code Caches |
157
Voted
STORAGESS
2005
ACM
16 years 8 days ago
2005
ACM
Improper access of data buffers is one of the most common errors in programs written in assembler, C, C++, and several other languages. Existing programs and OSs frequently acces...
194
Voted
CIDR
2009
15 years 7 months ago
2009
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
176
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CCS
2007
ACM
16 years 27 days ago
2007
ACM
We propose minimalist new hardware additions to a microprocessor chip that protect cryptographic keys in portable computing devices which are used in the field but owned by a cen...
181
Voted
ASPLOS
2010
ACM
16 years 1 months ago
2010
ACM
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
173
Voted
HPN
1992
15 years 7 months ago
1992
This paper describes a new host interface architecture for high-speed networks operating at 800 of Mbit/second or higher rates. The architecture is targeted to achieve several 100...