230 search results - page 9 / 46 » Hardware Support for Control Transfers in Code Caches |
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
A novel object-oriented processor is proposed in this paper, which provides support for object addressing, message passing and dynamic memory management. Object running on this pr...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
Image processing applications tend to access their data non-sequentially and reuse that data infrequently. As a result, they tend to perform poorly on conventional memory systems ...
IEEEINTERACT
2003
IEEE
14 years 23 days ago
2003
IEEE
Speculative pre-execution is a promising prefetching technique which uses an auxiliary assisting thread in addition to the main program flow. A prefetching thread (p-thread), whic...