29 search results - page 1 / 6 » Hardware Support for Fast Capability-based Addressing |
ASPLOS
1994
ACM
14 years 3 months ago
1994
ACM
VLSID
2008
IEEE
14 years 11 months ago
2008
IEEE
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
ICCD
2006
IEEE
14 years 7 months ago
2006
IEEE
— The influence of interconnects on processor performance and cost is becoming increasingly pronounced with technology scaling. In this paper, we present a fast compression sche...
ISCA
1993
IEEE
14 years 3 months ago
1993
IEEE
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
ISCA
1995
IEEE
14 years 2 months ago
1995
IEEE
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...