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» Hardware Support for Interval Arithmetic
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MICRO
2008
IEEE
113views Hardware» more  MICRO 2008»
14 years 2 months ago
From SODA to scotch: The evolution of a wireless baseband processor
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, ...
ICCD
2007
IEEE
200views Hardware» more  ICCD 2007»
14 years 4 months ago
A parallel IEEE P754 decimal floating-point multiplier
Decimal floating-point multiplication is important in many commercial applications including banking, tax calculation, currency conversion, and other financial areas. This paper...
Brian J. Hickmann, Andrew Krioukov, Michael J. Sch...
SIPS
2007
IEEE
14 years 1 months ago
Embedded Reconfigurable Solution for OFDM Detection Over Fast Fading Radio Channels
OFDM demodulation under fast fading radio channels is very computationally demanding, making the implementation of Software Defined Radio (SDR) solutions problematic. A suboptima...
Mihai Sima, Michael McGuire
TVLSI
2008
133views more  TVLSI 2008»
13 years 7 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
13 years 12 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...