339 search results - page 13 / 68 » Hardware Synthesis for Multi-Dimensional Time |
131
Voted
ISQED
2003
IEEE
15 years 9 months ago
2003
IEEE
In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. ...
155
click to vote
GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
175
Voted
ISSS
1996
IEEE
15 years 8 months ago
1996
IEEE
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
139
Voted
ACSD
2005
IEEE
15 years 9 months ago
2005
IEEE
Asynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed processes in digital systems. In previous work, syst...
154
Voted
DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...