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DATE
2006
IEEE
127views Hardware» more  DATE 2006»
15 years 10 months ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
Luca Fanucci, Michele Cassiano, Sergio Saponara, D...
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
15 years 10 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
AES
2004
Springer
190views Cryptology» more  AES 2004»
15 years 9 months ago
Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results
Abstract. When cryptosystems are being used in real life, hardware and software implementations themselves present a fruitful field for attacks. Side channel attacks exploit infor...
Elena Trichina, Tymur Korkishko, Kyung-Hee Lee
DATE
1999
IEEE
100views Hardware» more  DATE 1999»
15 years 8 months ago
The Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems
We propose a conceptual framework, called the Rugby Model, in which designs, design processes and design tools can be studied. It is an extension of the Y chart and adds two dimen...
Axel Jantsch, Shashi Kumar, Ahmed Hemani
ISSS
1995
IEEE
121views Hardware» more  ISSS 1995»
15 years 7 months ago
A comprehensive estimation technique for high-level synthesis
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
Seong Yong Ohm, Fadi J. Kurdahi, Nikil Dutt, Min X...