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» Hardware Synthesis from C C Models
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136
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ASPDAC
2009
ACM
133views Hardware» more  ASPDAC 2009»
15 years 4 months ago
A combined analytical and simulation-based model for performance evaluation of a reconfigurable instruction set processor
Performance evaluation is a serious challenge in designing or optimizing reconfigurable instruction set processors. The conventional approaches based on synthesis and simulations a...
Farhad Mehdipour, Hamid Noori, Bahman Javadi, Hiro...
143
Voted
ISSS
1995
IEEE
83views Hardware» more  ISSS 1995»
15 years 7 months ago
Profiling in the ASP codesign environment
Automation of the Hardware/Software Codesign methodology brings with it the need to develop sophisticated high-level profiling tools. This paper presents a profiling tool which us...
Matthew F. Parkinson, Sri Parameswaran
122
Voted
SAT
2005
Springer
142views Hardware» more  SAT 2005»
15 years 9 months ago
Optimizations for Compiling Declarative Models into Boolean Formulas
Advances in SAT solver technology have enabled many automated analysis and reasoning tools to reduce their input problem to a SAT problem, and then to use an efficient SAT solver ...
Darko Marinov, Sarfraz Khurshid, Suhabe Bugrara, L...
114
Voted
FPL
2006
Springer
95views Hardware» more  FPL 2006»
15 years 7 months ago
Automation of IP Core Interface Generation for Reconfigurable Computing
Pre-designed IP cores for FPGAs represent a huge intellectual and financial wealth that must be leveraged by any high-level tool targeting reconfigurable platforms. In this paper ...
Zhi Guo, Abhishek Mitra, Walid A. Najjar
174
Voted
SPAA
1996
ACM
15 years 7 months ago
From AAPC Algorithms to High Performance Permutation Routing and Sorting
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
Thomas Stricker, Jonathan C. Hardwick