3902 search results - page 156 / 781 » Hardware Synthesis from C C Models |
105
Voted
DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
Abstract. Congestion has negative effects on network performance. In this paper, a novel congestion control strategy is presented for Networks-on-Chip (NoC). For this purpose we in...
160
Voted
ACMMSP
2006
ACM
15 years 9 months ago
2006
ACM
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
149
Voted
IWCMC
2006
ACM
15 years 9 months ago
2006
ACM
Multipath fading heavily contributes to the unreliability of wireless links, causing fairly large deviations from link quality predictions based on path loss models; its impact on...
ISSS
2002
IEEE
15 years 8 months ago
2002
IEEE
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
110
Voted
WSC
2004
15 years 5 months ago
2004
This paper presents VITASCOPE, a general-purpose, userextensible 3D visualization system for animating processes that are modeled using Discrete-Event Simulation tools. VITASCOPE ...