3902 search results - page 182 / 781 » Hardware Synthesis from C C Models |
121
Voted
PRDC
2007
IEEE
15 years 10 months ago
2007
IEEE
Several recent studies identify the memory system as the most frequent source of hardware failures in commercial servers. Techniques to protect the memory system from failures mus...
131
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ISPD
2003
ACM
15 years 9 months ago
2003
ACM
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
109
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ISBI
2009
IEEE
15 years 10 months ago
2009
IEEE
Recently various mathematical models have been proposed to model the signal attenuation obtained from Diffusion Weighted Magnetic Resonance Imaging (DW-MRI). Though effective to v...
122
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ICCD
2006
IEEE
16 years 26 days ago
2006
IEEE
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
193
Voted
ASPDAC
2005
ACM
15 years 6 months ago
2005
ACM
This paper proposes a novel O(n) Parallel Banker’s Algorithm (PBA) with a best-case run-time of O(1), reduced from an ¢¤£¦¥¨§© run-time complexity of the original Ban...