3902 search results - page 33 / 781 » Hardware Synthesis from C C Models |
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
ASAP
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper, a routing model for minimizing hot spots in the network on chip (NOC) is presented. The model makes use of AntNet routing algorithm which is based on Ant colony. Us...
ISCAS
2007
IEEE
14 years 3 months ago
2007
IEEE
— This paper presents GAPSYS - a genetic algorithm based automated circuit synthesis tool for passive analog circuits. It describes the procedure for developing both the circuit ...
GLVLSI
2003
IEEE
14 years 2 months ago
2003
IEEE
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...