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FPL
2010
Springer
124views Hardware» more  FPL 2010»
13 years 8 months ago
Finding System-Level Information and Analyzing Its Correlation to FPGA Placement
One of the more popular placement algorithms for Field Programmable Gate Arrays (FPGAs) is called Simulated Annealing (SA). This algorithm tries to create a good quality placement ...
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
DLOG
2006
13 years 11 months ago
Tableau Caching for Description Logics with Inverse and Transitive Roles
Abstract. Modern description logic (DL) reasoners are known to be less efficient for DLs with inverse roles. The current loss of performance is largely due to the missing applicabi...
Yu Ding, Volker Haarslev
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
14 years 2 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...
SIGMETRICS
2011
ACM
161views Hardware» more  SIGMETRICS 2011»
13 years 29 days ago
Modeling program resource demand using inherent program characteristics
The workloads in modern Chip-multiprocessors (CMP) are becoming increasingly diversified, creating different resource demands on hardware substrate. It is necessary to allocate h...
Jian Chen, Lizy Kurian John, Dimitris Kaseridis
CODES
2006
IEEE
14 years 4 months ago
A formal approach to robustness maximization of complex heterogeneous embedded systems
Embedded system optimization typically considers objectives such as cost, timing, buffer sizes and power consumption. Robustness criteria, i.e. sensitivity of the system to variat...
Arne Hamann, Razvan Racu, Rolf Ernst