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SYNASC
2005
IEEE
117views Algorithms» more  SYNASC 2005»
14 years 2 months ago
Functional-Based Synthesis of Systolic Online Multipliers
— Systolic online algorithms for the multiplication of univariate polynomials and of multiple precision integers are synthesised using a novel method based on the following funct...
Tudor Jebelean, Laura Szakacs
DSD
2009
IEEE
88views Hardware» more  DSD 2009»
13 years 6 months ago
A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
DATE
2005
IEEE
97views Hardware» more  DATE 2005»
14 years 2 months ago
Synchronization Processor Synthesis for Latency Insensitive Systems
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
Pierre Bomel, Eric Martin, Emmanuel Boutillon
ECBS
2005
IEEE
110views Hardware» more  ECBS 2005»
14 years 2 months ago
Synthesis of C++ Software from Verifiable CSPm Specifications
CSP++ is an object-oriented application framework for execution of CSP specifications that have been automatically synthesized into C++ source code by the cspt translator. We desc...
Stephen Doxsee, William B. Gardner
LCTRTS
2007
Springer
14 years 2 months ago
Interface synthesis for heterogeneous multi-core systems from transaction level models
This paper presents a tool for automatic synthesis of RTL interfaces for heterogeneous MPSoC from transaction level models (TLMs). The tool captures the communication parameters i...
Hansu Cho, Samar Abdi, Daniel Gajski