Sciweavers

974 search results - page 39 / 195
» Hardware Synthesis from Term Rewriting Systems
Sort
View
DATE
1997
IEEE
95views Hardware» more  DATE 1997»
14 years 1 months ago
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications
A design methodology for the synthesis of digital circuits used in high throughput digital modems is presented. The methodology spans digital modem design from the link level to t...
Patrick Schaumont, Serge Vernalde, Luc Rijnders, M...
ISPD
2003
ACM
88views Hardware» more  ISPD 2003»
14 years 2 months ago
Synthesis and placement flow for gain-based programmable regular fabrics
In this paper we present the Gain-based Logic Block Array (GLA), a new via-programmable regular fabric. GLA is an array of Gainbased Logic Blocks (GLBs). The GLB is a semi-univers...
Bo Hu, Hailin Jiang, Qinghua Liu, Malgorzata Marek...
FPGA
2010
ACM
197views FPGA» more  FPGA 2010»
14 years 5 days ago
A 3d-audio reconfigurable processor
Various multimedia communication systems based on 3DAudio algorithms have been proposed by researchers from the acoustic data processing domain. However, all systems reported in t...
Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi G...
ISLPED
1999
ACM
86views Hardware» more  ISLPED 1999»
14 years 1 months ago
Power macro-models for DSP blocks with application to high-level synthesis
Abstract – In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, suc...
Subodh Gupta, Farid N. Najm
FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
14 years 3 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang