55 search results - page 9 / 11 » Hardware and Petri Nets: Application to Asynchronous Circuit... |
ICECCS
2000
IEEE
14 years 28 days ago
2000
IEEE
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
ICCAD
2005
IEEE
14 years 5 months ago
2005
IEEE
— The flip-chip package gives the highest chip density of any packaging method to support the pad-limited Application-Specific Integrated Circuit (ASIC) designs. In this paper,...
DSD
2006
IEEE
14 years 6 days ago
2006
IEEE
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis m...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
ASYNC
2002
IEEE
14 years 1 months ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...