951 search results - page 144 / 191 » Hardware design experiences in ZebraNet |
DAC
2005
ACM
15 years 3 days ago
2005
ACM
Dual-execution/checkpointing based transient error tolerance techniques have been widely used in the high-end mission critical systems. These techniques, however, are not very att...
CAV
2009
Springer
14 years 11 months ago
2009
Springer
We present the key ideas in the design and implementation of Beaver, an SMT solver for quantifier-free finite-precision bit-vector logic (QF BV). Beaver uses an eager approach, enc...
HPCA
2001
IEEE
14 years 11 months ago
2001
IEEE
This paper presents a new method for branch prediction. The key idea is to use one of the simplest possible neural networks, the perceptron as an alternative to the commonly used ...
ICCD
2007
IEEE
14 years 8 months ago
2007
IEEE
The cache hierarchy of state-of-the-art—especially multicore—microprocessors consumes a significant amount of area and energy. A significant amount of research has been devo...
ICCAD
2004
IEEE
14 years 8 months ago
2004
IEEE
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...