951 search results - page 179 / 191 » Hardware design experiences in ZebraNet |
ISQED
2010
IEEE
14 years 2 months ago
2010
IEEE
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
TEI
2010
ACM
14 years 2 months ago
2010
ACM
Tangible user interfaces enable the interaction with digital information through the physical world. For the binding of physical representations with the underlying digital inform...
SENSYS
2009
ACM
14 years 2 months ago
2009
ACM
Clock synchronization is highly desirable in many sensor networking applications. It enables event ordering, coordinated actuation, energy-efficient communication and duty cyclin...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—This paper reports on experience gained and lessons learned from an intensive investigation of model-driven engineering methodology and technology for application to high-integr...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...