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ASPDAC
2007
ACM
89views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Trace Compaction using SAT-based Reachability Analysis
In today's designs, when functional verification fails, engineers perform debugging using the provided error traces. Reducing the length of error traces can help the debugging...
Sean Safarpour, Andreas G. Veneris, Hratch Mangass...
ATVA
2007
Springer
134views Hardware» more  ATVA 2007»
13 years 11 months ago
Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...
Moonzoo Kim
CAV
2007
Springer
114views Hardware» more  CAV 2007»
13 years 11 months ago
Configurable Software Verification: Concretizing the Convergence of Model Checking and Program Analysis
In automatic software verification, we have observed a theoretical convergence of model checking and program analysis. In practice, however, model checkers are still mostly concern...
Dirk Beyer, Thomas A. Henzinger, Grégory Th...
DATE
2009
IEEE
64views Hardware» more  DATE 2009»
13 years 11 months ago
Speculative reduction-based scalable redundancy identification
The process of sequential redundancy identification is the cornerstone of sequential synthesis and equivalence checking frameworks. The scalability of the proof obligations inhere...
Hari Mony, Jason Baumgartner, Alan Mishchenko, Rob...
DATE
2004
IEEE
92views Hardware» more  DATE 2004»
13 years 11 months ago
Optimization of Integrated Spiral Inductors Using Sequential Quadratic Programming
The optimization of integrated spiral inductors has great practical importance. Previous optimization methods used in this field are either too slow or depend on very simplified a...
Yong Zhan, Sachin S. Sapatnekar