421 search results - page 12 / 85 » Hardware efficient architectures for Eigenvalue computation |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
Novel reconfigurable computing architectures exploit the inherent parallelism available in many signalprocessing problems. These architectures often consist of networks of compute...
IFIP12
2007
13 years 10 months ago
2007
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
FPL
2007
Springer
14 years 2 months ago
2007
Springer
Numerical non-robustness is a recurring phenomenon in scientific computing. It is primarily caused by numerical errors arising because of fixed-precision arithmetic in integer and...
JIRS
2007
13 years 8 months ago
2007
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
CCECE
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...