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» Hardware efficient architectures for Eigenvalue computation
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ICCSA
2007
Springer
14 years 1 months ago
FRASH: Hierarchical File System for FRAM and Flash
Abstract. In this work, we develop novel file system, FRASH, for byteaddressable NVRAM (FRAM[1]) and NAND Flash device. Byte addressable NVRAM and NAND Flash is typified by the DRA...
Eun-ki Kim, Hyungjong Shin, Byung-gil Jeon, Seokhe...
DAC
2010
ACM
13 years 10 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
HPCA
2008
IEEE
14 years 7 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
ANCS
2010
ACM
13 years 5 months ago
Ensemble routing for datacenter networks
: Ensemble Routing For Datacenter Networks Mike Schlansker, Yoshio Turner, Jean Tourrilhes, Alan Karp HP Laboratories HPL-2010-120 Networks, Ethernet, Multipath, Switching, Fault ...
Mike Schlansker, Yoshio Turner, Jean Tourrilhes, A...
SIGGRAPH
1997
ACM
13 years 11 months ago
Rendering with coherent layers
For decades, animated cartoons and movie special effects have factored the rendering of a scene into layers that are updated independently and composed in the final display. We ap...
Jed Lengyel, John Snyder