111 search results - page 17 / 23 » Hardware scheduling support in SMP architectures |
DAC
2004
ACM
14 years 7 months ago
2004
ACM
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...
FPL
2007
Springer
14 years 27 days ago
2007
Springer
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
The design challenge for large-scale multiprocessors is (1) to minimize communication overhead, (2) allow communication to overlap computation, and (3) coordinate the two without ...
MICRO
2005
IEEE
14 years 9 days ago
2005
IEEE
We introduce techniques to support efficient non-atomic execution of very long traces on a new binary translation based, x86-64 compatible VLIW microprocessor. Incrementally comm...
IWMM
2011
Springer
12 years 9 months ago
2011
Springer
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...