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DATE
2009
IEEE
172views Hardware» more  DATE 2009»
14 years 2 months ago
On bounding response times under software transactional memory in distributed multiprocessor real-time systems
We consider multiprocessor distributed real-time systems where concurrency control is managed using software transactional memory (or STM). For such a system, we propose an algori...
Sherif Fadel Fahmy, Binoy Ravindran, E. Douglas Je...
DAC
2002
ACM
14 years 8 months ago
Compiler-directed scratch pad memory hierarchy design and management
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly impo...
Mahmut T. Kandemir, Alok N. Choudhary
FPL
2004
Springer
164views Hardware» more  FPL 2004»
13 years 11 months ago
Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors
Abstract. In Reconfigurable Systems-On-Chip (RSoCs), operating systems can primarily (1) manage the sharing of limited reconfigurable resources, and (2) support communication betwe...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
ITC
2003
IEEE
168views Hardware» more  ITC 2003»
14 years 20 days ago
Agent Based DBIST/DBISR And Its Web/Wireless Management
This paper presents an attempt of using intelligent agents for testing and repairing a distributed system, whose elements may or may not have embedded BIST (Built-In Self-Test) an...
Liviu Miclea, Szilárd Enyedi, Gavril Todere...
FPL
2009
Springer
117views Hardware» more  FPL 2009»
14 years 1 days ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...