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DATE
2010
IEEE
147views Hardware» more  DATE 2010»
13 years 10 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
DATE
2007
IEEE
103views Hardware» more  DATE 2007»
14 years 1 months ago
Flexible hardware reduction for elliptic curve cryptography in GF(2m)
In this paper we discuss two ways to provide flexible hardware support for the reduction step in Elliptic Curve Cryptography in binary fields (GF(2m )). In our first approach w...
Steffen Peter, Peter Langendörfer, Krzysztof ...
EUSFLAT
2003
128views Fuzzy Logic» more  EUSFLAT 2003»
13 years 9 months ago
Hardware implementation of a fuzzy Petri net based on VLSI digital circuits
Industrial processes can be often modelled using Petri nets. If all the process variables (or events) are assumed to be twovalued signals, then it is possible to obtain a hardware...
Jacek Kluska, Zbigniew Hajduk
CDES
2008
123views Hardware» more  CDES 2008»
13 years 9 months ago
R-tree: A Hardware Implementation
R-tree data structures are widely used in spatial databases to store, manage and manipulate spatial information. As the data volume of such databases is typically very large, the q...
Xiang Xiao, Tuo Shi, Pranav Vaidya, Jaehwan John L...
NCA
2006
IEEE
13 years 7 months ago
Evolutionary training of hardware realizable multilayer perceptrons
The use of multilayer perceptrons (MLP) with threshold functions (binary step function activations) greatly reduces the complexity of the hardware implementation of neural networks...
Vassilis P. Plagianakos, George D. Magoulas, Micha...