21 search results - page 2 / 5 » Hardware starting approximation for the square root operatio... |
ARITH
2007
IEEE
14 years 3 months ago
2007
IEEE
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
TPCD
1994
13 years 10 months ago
1994
Theorem proving techniques are particularly well suited for reasoning about arithmetic above the bit level and for relating di erent f abstraction. In this paper we show how a non-...
FPL
2010
Springer
13 years 6 months ago
2010
Springer
Abstract--Most current square root implementations for FPGAs use a digit recurrence algorithm which is well suited to their LUT structure. However, recent computing-oriented FPGAs ...
DATE
2007
IEEE
13 years 9 months ago
2007
IEEE
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
ARITH
1999
IEEE
1999
IEEE
Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms
14 years 1 months ago
This paper describes a study of a class of algorithms for the floating-point divide and square root operations, based on the Newton-Raphson iterative method. The two main goals we...