Sciweavers

734 search results - page 44 / 147
» Hardware support for code integrity in embedded processors
Sort
View
VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
SAMOS
2005
Springer
14 years 1 months ago
Automatic ADL-Based Assembler Generation for ASIP Programming Support
Abstract. Systems-on-Chip (SoCs) may be built upon general purpose CPUs or application-specific instruction-set processors (ASIPs). On the one hand, ASIPs allow a tradeoff betwee...
Leonardo Taglietti, José O. Carlomagno Filh...
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...
DATE
2004
IEEE
181views Hardware» more  DATE 2004»
13 years 11 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
DAC
1998
ACM
13 years 12 months ago
A Geographically Distributed Framework for Embedded System Design and Validation
The di culty of embedded system co-design is increasing rapidly due to the increasing complexity of individual parts, the variety of parts available and pressure to use multiple p...
Ken Hines, Gaetano Borriello