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» Hardware support for code integrity in embedded processors
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ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
13 years 5 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Architectural Optimizations for Text to Speech Synthesis in Embedded Systems
Abstract-- The increasing processing power of embedded devices have created the scope for certain applications that could previously be executed in desktop environments only, to mi...
Soumyajit Dey, Monu Kedia, Anupam Basu
CODES
2008
IEEE
14 years 2 months ago
Distributed and low-power synchronization architecture for embedded multiprocessors
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
Chenjie Yu, Peter Petrov
WSNA
2003
ACM
14 years 26 days ago
MANTIS: system support for multimodAl NeTworks of in-situ sensors
The MANTIS MultimodAl system for NeTworks of In-situ wireless Sensors provides a new multithreaded embedded operating system integrated with a general-purpose single-board hardwar...
Hector Abrach, Shah Bhatti, James Carlson, Hui Dai...