Sciweavers

734 search results - page 83 / 147
» Hardware support for code integrity in embedded processors
Sort
View
CORR
2010
Springer
89views Education» more  CORR 2010»
13 years 7 months ago
Power optimized programmable embedded controller
Now a days, power has become a primary consideration in hardware design, and is critical in computer systems especially for portable devices with high performance and more functio...
M. Kamaraju, K. Lal Kishore, A. V. N. Tilak
FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 1 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
CODES
2007
IEEE
14 years 2 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
CODES
2008
IEEE
14 years 2 months ago
Online adaptive utilization control for real-time embedded multiprocessor systems
To provide Quality of Service (QoS) guarantees in open and unpredictable environments, the utilization control problem is defined to keep the processor utilization at the schedula...
Jianguo Yao, Xue Liu, Mingxuan Yuan, Zonghua Gu
CODES
2007
IEEE
14 years 2 months ago
A smart random code injection to mask power analysis based side channel attacks
One of the security issues in embedded system is the ability of an adversary to perform side channel attacks. Power analysis attacks are often very successful, where the power seq...
Jude Angelo Ambrose, Roshan G. Ragel, Sri Paramesw...