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» Hardware synthesis from protocol specifications in LOTOS
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ASYNC
2005
IEEE
132views Hardware» more  ASYNC 2005»
14 years 1 months ago
High Level Synthesis of Timed Asynchronous Circuits
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, C...
DAC
2010
ACM
13 years 7 months ago
Automatic multithreaded pipeline synthesis from transactional datapath specifications
We present a technique to automatically synthesize a multithreaded in-order pipeline from a high-level unpipelined datapath specification. This work extends the previously propose...
Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timo...
ISSS
1998
IEEE
130views Hardware» more  ISSS 1998»
13 years 11 months ago
Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software Codesign System
In this paper, we propose the target board architecture of a rapid prototyping embedded system based on hardware software codesign. The target board contains a TMS320C30 DSP proce...
Yin-Tsung Hwang, Yuan-Hung Wang
ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
13 years 11 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...
ICCAD
1994
IEEE
127views Hardware» more  ICCAD 1994»
13 years 11 months ago
Synthesis of concurrent system interface modules with automatic protocol conversion generation
-- We describe a new high-level compiler called Integral fordesigning system interface modules. The inputis a high-levelconcurrent algorithmic specification that can model complex ...
Bill Lin, Steven Vercauteren