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CODES
2005
IEEE
14 years 10 days ago
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
Hyunok Oh, Nikil D. Dutt, Soonhoi Ha
EMSOFT
2006
Springer
13 years 10 months ago
New approach to architectural synthesis: incorporating QoS constraint
Embedded applications like video decoding, video streaming and those in the network domain, typically have a Quality of Service (QoS) requirement which needs to be met. Apart from...
Harsh Dhand, Basant Kumar Dwivedi, M. Balakrishnan
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 23 days ago
Multiprocessor synthesis for periodic hard real-time tasks under a given energy constraint
The energy-aware design for electronic systems has been an important issue in hardware and/or software implementations, especially for embedded systems. This paper targets a synth...
Heng-Ruey Hsu, Jian-Jia Chen, Tei-Wei Kuo
CODES
2006
IEEE
14 years 23 days ago
Automatic run-time extraction of communication graphs from multithreaded applications
Embedded system synthesis, multiprocessor synthesis, and thread assignment policy design all require detailed knowledge of the runtime communication patterns among different threa...
Ai-Hsin Liu, Robert P. Dick
CODES
2003
IEEE
14 years 8 hour ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid