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» Heterogeneous behavioral hierarchy for system level designs
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DATE
2003
IEEE
123views Hardware» more  DATE 2003»
14 years 23 days ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
DAC
2006
ACM
14 years 8 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 4 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
14 years 12 days ago
A New Performance Evaluation Approach for System Level Design Space Exploration
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...
M. Balakrishnan, Anshul Kumar, C. P. Joshi
HCI
2001
13 years 8 months ago
Involving seniors in designing information architecture for the web
The present study utilized the card sorting technique and cluster analysis to define the best information architecture of Web health information for seniors. Sixteen seniors parti...
Sri Hastuti Kurniawan, Panayiotis Zaphiris, R. Dar...