265 search results - page 50 / 53 » Heterogeneous memory management for embedded systems |
150
click to vote
IISWC
2006
IEEE
15 years 10 months ago
2006
IEEE
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
173
click to vote
DAC
2006
ACM
15 years 6 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
134
click to vote
VLSID
2009
IEEE
16 years 4 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
148
click to vote
ANCS
2007
ACM
15 years 8 months ago
2007
ACM
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
165
click to vote
FPL
2004
Springer
15 years 7 months ago
2004
Springer
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...