Sciweavers

103 search results - page 10 / 21
» Hierarchical Design of Fast Minimum Disagreement Algorithms
Sort
View
IJON
2010
189views more  IJON 2010»
13 years 6 months ago
Inference and parameter estimation on hierarchical belief networks for image segmentation
We introduce a new causal hierarchical belief network for image segmentation. Contrary to classical tree structured (or pyramidal) models, the factor graph of the network contains...
Christian Wolf, Gérald Gavin
IPPS
2006
IEEE
14 years 1 months ago
Hierarchically tiled arrays for parallelism and locality
Parallel programming is facilitated by constructs which, unlike the widely used SPMD paradigm, provide programmers with a global view of the code and data structures. These constr...
Jia Guo, Ganesh Bikshandi, Daniel Hoeflinger, Gheo...
ICCAD
1999
IEEE
90views Hardware» more  ICCAD 1999»
13 years 12 months ago
An implicit connection graph maze routing algorithm for ECO routing
Abstract-- ECO routing is a very important design capability in advanced IC, MCM and PCB designs when additional routings need to be made at the latter stage of the physical design...
Jason Cong, Jie Fang, Kei-Yong Khoo
DAC
1998
ACM
13 years 12 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
IPPS
2002
IEEE
14 years 16 days ago
Fast Inductance Extraction of Large VLSI Circuits
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
Hemant Mahawar, Vivek Sarin, Weiping Shi