Sciweavers

238 search results - page 15 / 48
» Hierarchical Interconnect Circuit Models
Sort
View
SLIP
2009
ACM
14 years 2 months ago
Prediction of high-performance on-chip global interconnection
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin...
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 8 months ago
Efficient Macromodeling for On-Chip Interconnects
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...
Qinwei Xu, Pinaki Mazumder
IPPS
2000
IEEE
14 years 11 hour ago
Connectivity Models for Optoelectronic Computing Systems
Abstract. Rent's rule and related concepts of connectivity such as dimensionality, line-length distributions, and separators have found great use in fundamental studies of di ...
Haldun M. Özaktas
ICCAD
2001
IEEE
74views Hardware» more  ICCAD 2001»
14 years 4 months ago
Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect
Interconnect structures including dielectrics can be modeled by an integral equation method using volume currents and surface charges for the conductors, and volume polarization c...
Luca Daniel, Alberto L. Sangiovanni-Vincentelli, J...
ICCAD
2002
IEEE
145views Hardware» more  ICCAD 2002»
14 years 4 months ago
A local circuit topology for inductive parasitics
A novel circuit topology for inductive coupling between interconnecting wires is presented. The model is local, i.e., only coupling between neighboring wires is explicitly modeled...
Andrea Pacelli