238 search results - page 22 / 48 » Hierarchical Interconnect Circuit Models |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper presents figures of merit and error formulae to determine which interconnects require volume discretization in the GHZ range. Most of the previous work focused mainly o...
CNSR
2006
IEEE
14 years 1 months ago
2006
IEEE
The deployment of Reconfigurable Optical Add/Drop Multiplexers (ROADMs) is going to change the conventional architecture for metro networks. In this paper, we present detailed fea...
TCAD
2008
13 years 7 months ago
2008
We present in this paper a new interconnect-driven multilevel floorplanner, called interconnect-driven multilevelfloorplanning framework (IMF), to handle large-scale buildingmodule...
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
Architecture development for FPGAs has typically been a very empirical discipline, requiring the synthesis of benchmark circuits into candidate architectures. This is difficult to...
ISQED
2002
IEEE
14 years 17 days ago
2002
IEEE
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...