238 search results - page 24 / 48 » Hierarchical Interconnect Circuit Models |
FPGA
1998
ACM
13 years 12 months ago
1998
ACM
The goal of this paper is to perform a timing optimization of a circuit described by a network of cells on a target structure whose connection delays have discrete values following...
FSKD
2011
Springer
12 years 7 months ago
2011
Springer
—This paper describes a model of a hierarchical, heterogeneous knowledge-base. The proposed model consists of an associative level that is implemented by a Kanerva-like sparse di...
ANSS
1997
IEEE
13 years 12 months ago
1997
IEEE
HPAM Sim is an execution-driven simulator of heterogeneous machines. HPAM Sim allows the simulation of target machines consisting of different processors and interconnection netwo...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— Decoupling capacitors (decaps) are typically used to reduce the noise in the power supply network. Because the delay of gates and interconnects is affected by the supply voltag...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...