251 search results - page 47 / 51 » Hierarchical Modeling and Simulation of Large Analog Circuit... |
ESAW
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Motivated by demands from the commercial world for software systems that can assist in the reorganisation of processes for the purpose of reducing business complexity, we...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
This paper provides a case study that shows how a demanding application stresses the capabilities of today's CAD tools, especially in the integration of products from multipl...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a...