319 search results - page 21 / 64 » Hierarchical Simulation of a Multiprocessor Architecture |
CODES
2003
IEEE
14 years 26 days ago
2003
IEEE
In the Sesame framework, we develop a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
ISSS
2002
IEEE
14 years 14 days ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
TC
1998
13 years 7 months ago
1998
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
ADHOC
2008
13 years 7 months ago
2008
As wireless devices become more pervasive, mobile ad hoc networks are gaining importance, motivating the development of highly scalable ad hoc networking techniques. In this paper...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
This paper provides a case study that shows how a demanding application stresses the capabilities of today's CAD tools, especially in the integration of products from multipl...