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» Hierarchical Simulation of a Multiprocessor Architecture
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DAC
2003
ACM
14 years 8 months ago
A tool for describing and evaluating hierarchical real-time bus scheduling policies
We present a tool suite for building, simulating, and analyzing the results of hierarchical descriptions of the scheduling policy for modules sharing a bus in real-time applicatio...
Trevor Meyerowitz, Claudio Pinello, Alberto L. San...
HPCA
2007
IEEE
14 years 8 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
TPDS
2008
134views more  TPDS 2008»
13 years 7 months ago
Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On th...
Ricardo Fernández Pascual, José M. G...
CEEMAS
2007
Springer
14 years 1 months ago
Simulating a Human Cooperative Problem Solving
Abstract. We are interested in understanding and simulating how humans elaborate plans in situations where knowledge is incomplete and how they interact to obtain missing informati...
Alexandre Pauchet, Amal El Fallah-Seghrouchni, Nat...
DAC
1997
ACM
13 years 11 months ago
A Power Estimation Framework for Designing Low Power Portable Video Applications
This paper presents a power evaluation framework designed for estimating power consumption of a new video telephone compression standard, ITU-H.263, at the system level. A hierarc...
Chi-Ying Tsui, Kai-Keung Chan, Qing Wu, Chih-Shun ...