59 search results - page 8 / 12 » Hierarchical Test Generation with Built-In Fault Diagnosis |
ATS
2009
IEEE
14 years 2 months ago
2009
IEEE
Diagnosis is increasingly important, not only for individual analysis of failing ICs, but also for high-volume test response analysis which enables yield and test improvement. Sca...
DELTA
2008
IEEE
14 years 2 months ago
2008
IEEE
Scan is a widely used design-for-testability technique to improve test and diagnosis quality, however, scan chain failures account for almost 50% of chip failures. In this paper, ...
CSREAESA
2008
13 years 9 months ago
2008
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
ICDCS
1993
IEEE
13 years 11 months ago
1993
IEEE
In this paper, we propose a diagnostic algorithm for the case where distributed system specifications (implementations) are given in the form of communicating finite state machine...
ITC
1997
IEEE
13 years 11 months ago
1997
IEEE
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests for them is becoming a serious problem in industry. This paper...