To construct complete systems on silicon, application specic DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
In most modern processor designs the L1 data cache has become a major consumer of power due to its increasing size and high frequency access rate. In order to reduce this power con...
P. Carazo, R. Apolloni, Fernando Castro, Daniel Ch...
The Kasumi block cipher provides integrity and confidentiality services for 3G wireless networks, but it also forms a bottleneck due to its computational overhead. Especially in ...
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction and speculatively executes its data-dependent instructions based on th...
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...